5GHz, 4-Channel MIMO Transmitter
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Table 8. Main Address 9: (A4:A0 = 01001, Main Address 0 D0 = 0)
Table 10. Main Address 14: (A4:A0 = 01110, Main Address 0 D0 = 0)
Table 9. Main Address 11: (A4:A0 = 01011, Main Address 0 D0 = 0)
BIT NAME
BIT LOCATION
(D0 = LSB)
DESCRIPTION
TX_GAIN<5:0>
D9:D4
Tx VGA Gain Control
Tx channel is selected by Main address 9 D3:D0.
000000 = Minimum gain (default)
&
111111 = Minimum gain + 31.5dB
TX_GAIN_PROG_SEL<4:1>
D3:D0
Tx Channel Gain Programming Select
Gain is determined by Main address 9 D9:D4.
0 = Not selected
1 = Selected
1111 = Default
BIT NAME
BIT LOCATION
(D0 = LSB)
DESCRIPTION
RESERVED
D9:D4
Reserved bits; set to default
E_TX_AMD<1:0>
D3:D2
Tx Calibration AM Detector Channel Select
Only active in Tx calibration mode.
00 = Select TX1 (default)
01 = Select TX2
10 = Select TX3
11 = Select TX4
PA_DET_SEL<1:0>
D1:D0
PA Power-Detector Mux Output Select
00 = Select PA_DET1 (default)
01 = Select PA_DET2
10 = Select PA_DET3
11 = Select PA_DET4
BIT NAME
BIT LOCATION
(D0 = LSB)
DESCRIPTION
RESERVED
D9:D2
Reserved bits; set to default
DOUT_SEL
D1
DOUT Pin Output Select
0 = PLL lock detect (default)
1 = SPI readback
RESERVED
D0
Reserved bits; set to default
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